Central Processing Unit (CPU) Architecture

Almost every modern computer follows the Von Neumann architecture. Its key idea is the stored program concept:

Both the program instructions and the data they use are stored together in the same main memory. The CPU fetches each instruction in turn and executes it.

Because the program lives in memory (not in fixed wiring), you can load a new program, change it, or run a different one without rebuilding the hardware — exactly what makes a computer "general purpose".

The Von Neumann machine has three big parts joined by buses:

• The CPU (central processing unit) — contains the Control Unit, the ALU, the registers and the clock.
• Main memory (the Immediate Access Store / RAM) — holds the program and data.
• Input / Output — how data gets in and out.

A register is a very small, very fast storage location inside the CPU. There are two kinds:

• General purpose registers — used by the program to hold any temporary value or intermediate result.
• Special purpose registers — each has one fixed job in the running of the cycle.

The special purpose registers you must know:

Register	Full name	Role
PC	Program Counter	Holds the address of the next instruction to fetch; incremented each cycle.
MAR	Memory Address Register	Holds the address of the location to be read/written; placed on the address bus.
MDR	Memory Data Register	Holds the data/instruction read from, or to be written to, memory; uses the data bus.
CIR	Current Instruction Register	Holds the current instruction while it is decoded and executed.
ACC	Accumulator	Holds the result of ALU calculations / data being processed.
IX	Index Register	Holds an offset added to an address (indexed addressing — e.g. arrays).
Status	Status Register	Holds flag bits recording outcomes (carry, zero, negative, overflow).

The killer memory aid: MAR = Address Register → ADDRESS; MDR = Data Register → DATA. Never the other way round.

Inside the CPU, three working components share the load:

Arithmetic and Logic Unit (ALU) — performs all arithmetic (add, subtract) and logic (compare, AND/OR/NOT) operations. Results are usually placed in the Accumulator (ACC).

Control Unit (CU) — the manager. It fetches, decodes and manages the execution of each instruction, and sends out control signals along the control bus to direct the ALU, registers and memory so they act in the right order. The CU does not do the calculations itself.

System clock — generates regular timing pulses at a fixed frequency. These pulses synchronise the CPU so each step happens at exactly the right moment. Clock speed is measured in hertz (cycles per second); a 3 GHz clock pulses 3 billion times a second.

Immediate Access Store (IAS) — the main memory (RAM) that the CPU can access directly and quickly to fetch instructions and data, as opposed to slow secondary storage.

A bus is a set of parallel wires that carries information between the CPU, memory and I/O. There are three:

Bus	Carries	Direction
Address bus	memory addresses (which location to use)	Unidirectional — addresses only leave the CPU
Data bus	the actual data / instructions	Bidirectional — read AND write
Control bus	control & timing signals (read, write, clock, interrupt)	carries signals both to and from the CPU

The width of a bus (its number of wires) matters: a wider data bus moves more bits at once, and a wider address bus can reference more memory locations.

The CPU runs a program by repeating one cycle over and over: Fetch → Decode → Execute.

We can write it precisely using register transfer notation, where [X] means "the contents of X":

FETCH — get the next instruction from memory:

MAR ← [PC]          copy the next-instruction address into the MAR
PC  ← [PC] + 1      move the PC on to the following instruction
MDR ← [[MAR]]       read memory at that address into the MDR (via the data bus)
CIR ← [MDR]         copy the fetched instruction into the CIR

(The notation [[MAR]] means "the contents of the memory location whose address is held in the MAR" — the double brackets are deliberate.)

DECODE — the Control Unit works out what the instruction in the CIR means (the operation and any operand/address it needs).

EXECUTE — the CPU carries out the instruction. For example the ALU performs a calculation and the result is stored in the ACC, or data is moved to/from memory.

Then the CPU checks for interrupts (see §8) before the cycle repeats. Incrementing the PC is what makes the CPU step through the program instead of repeating one instruction forever.

Four main factors affect how well a CPU performs:

• Clock speed — more pulses per second → more instructions per second. Cannot rise without limit because of heat.
• Number of cores — a core is an independent processing unit. More cores allow parallel processing (running several instructions/threads at once), but this only helps when the software can be split into tasks that run simultaneously.
• Bus width — a wider data bus moves more bits per transfer; a wider address bus can address more memory.
• Cache memory — a small, very fast memory close to the CPU that stores frequently/recently used data, so the CPU makes fewer slow fetches from main memory and spends less time waiting.

Ports are the sockets used to connect external devices:

Port	Used for
USB (Universal Serial Bus)	general-purpose connection for peripherals and data transfer (keyboards, storage, charging)
HDMI (High-Definition Multimedia Interface)	digital video and audio in one cable (monitors, TVs)
VGA (Video Graphics Array)	older analogue video only (no audio)

An interrupt is a signal sent to the CPU (from hardware or software) that says "stop what you are doing and deal with this." It lets the CPU respond to events without constantly checking devices itself.

Possible causes include:

• a hardware fault (e.g. printer out of paper, paper jam);
• an I/O device ready for data transfer;
• the timer/clock signalling that a time slice has ended (used in multitasking);
• a software error such as division by zero or an invalid instruction;
• a user action such as pressing a key.

When is it detected? At the END of each Fetch-Execute cycle — after the current instruction has finished. This means an instruction is never left half-done.

How it is handled (the ISR):

1. The CPU finishes the current instruction and checks for interrupts.
2. If one is present (and has high enough priority), it saves its current state — the contents of the PC and registers, usually by pushing them onto a stack.
3. It loads the address of the Interrupt Service Routine (ISR) into the PC, so execution jumps to the handler.
4. The ISR runs and deals with the cause (e.g. shows a "printer out of paper" message).
5. When the ISR finishes, the saved state is restored from the stack.
6. The interrupted program resumes from exactly where it left off.

Lower-priority interrupts may be made to wait while a higher-priority one is serviced.