Why is "Confusing immediate (#) with direct addressing — e.g. treating `LDM #10` as 'load the contents of address 10'." a common mistake in Assembly Language?

Why it happens: The # symbol is easy to overlook, and beginners assume every operand is an address. How to avoid it: Read the # carefully: `LDM #10` puts the value 10 into the ACC; `LDD 10` loads whatever is *stored* at address 10. Underline the # before tracing. Source: Examiner reports consistently flag immediate/direct confusion as the most common trace error.

Why is "Stopping after one lookup in indirect addressing, giving the pointer value instead of the data." a common mistake in Assembly Language?

Why it happens: Students treat LDI like LDD and read only the first address's contents. How to avoid it: Remember indirect needs TWO accesses: operand → contents (a pointer) → go to that pointer → contents (the data). Follow the arrow twice.

Why is "Swapping JPE and JPN — jumping when the compare was True for JPN, or False for JPE." a common mistake in Assembly Language?

Why it happens: The letters are similar and the True/False rule is easily forgotten under time pressure. How to avoid it: JP**E** = jump if compare is tru**E**; JP**N** = jump if **N**ot true (False). Write the rule at the top of your trace. Source: A frequently penalised slip that makes the whole loop trace wrong.

Why is "Applying INC/DEC to the wrong register — e.g. incrementing the ACC when the instruction said `INC IX`." a common mistake in Assembly Language?

Why it happens: The operand of INC/DEC names the register, and students skim past it. How to avoid it: Check the operand of INC/DEC every time: `INC ACC` changes the ACC, `INC IX` changes the Index Register used by indexed addressing.

Why is "In indexed addressing, forgetting to add the Index Register, so `LDX 200` is treated as `LDD 200`." a common mistake in Assembly Language?

Why it happens: Students don't track the value of IX or assume it is zero. How to avoid it: Effective address = operand + contents of IX. Always write the addition out (e.g. 200 + 2 = 202) and keep an IX column in your trace table.

Why is "Tracing 'in your head' and writing only a final answer, with no trace table." a common mistake in Assembly Language?

Why it happens: Short programs look simple, so students skip the working. How to avoid it: Always draw a trace table with a column per changing value (ACC, IX, key addresses, compare result, jump?). Method marks are available even if the final value is wrong. Source: Examiner reports note that answers without a trace table lose easy method marks.

Cambridge International A Levels Computer Science (9618)

Assembly Language

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Detailed Study Notes

Detailed notes on Processor Fundamentals for Cambridge International A Levels Computer Science, covering key concepts, explanations, examples, and exam-focused revision points.

Assembly Language — Cambridge AS & A Level Computer Science 9618 Study Notes (2027-2029)

How assembly language relates to machine code, how a two-pass assembler translates a program (building a symbol table), the five addressing modes (immediate, direct, indirect, indexed, relative), and how to trace a simple assembly program using a trace table. Everything is done by hand — Paper 1 allows no calculator, so neat trace tables are your most reliable tool.

At a glance

Assembly language uses mnemonics (LDD, ADD, JMP) — a low-level language with a roughly one-to-one match to machine code.
An assembler translates assembly into machine code (binary).
A two-pass assembler: pass 1 builds a symbol table of labels→addresses; pass 2 generates the code.
Each instruction = opcode (what to do) + operand (the data or its address).
Immediate (#) uses the value directly; direct uses the contents of an address.
Indirect follows a pointer (two lookups); indexed adds the Index Register (IX) to the operand.
Relative adds an offset to the current instruction's address → relocatable code.
9618 uses one general-purpose register ACC, an Index Register IX, and notation # denary, B binary, & hex.
Trace programs with a trace table — one column per changing value (ACC, IX, addresses, compare, jump?).

What you’ll learn

Mapped to the Cambridge International A Level 9618 syllabus (2027-2029).

4.2 — Show understanding of the relationship between assembly language and machine code.
4.2 — Describe the stages of the assembly process for a two-pass assembler.
4.2 — Trace a given simple assembly language program.
4.2 — Show understanding of the different instruction groups: data movement, input and output, arithmetic, unconditional and conditional instructions, compare.
4.2 — Show understanding of, and be able to use, the addressing modes: immediate, direct, indirect, indexed and relative.

Assembly language and machine code

Mnemonics make machine code readable; an assembler translates between them.

A processor can only execute machine code — instructions written in binary. Writing pure binary by hand is slow and error-prone, so programmers use assembly language instead.

Assembly language replaces binary instructions with short, memorable mnemonics:

Machine code (binary)	Assembly (mnemonic)	Meaning
0010 …	LDD 200	load contents of address 200
0001 …	ADD #5	add the value 5
1100 …	JMP 30	jump to address 30

Key facts examiners want:

Assembly language is low-level (close to the hardware), not high-level.
There is broadly a one-to-one relationship between an assembly instruction and a machine-code instruction.
Assembly must be translated by an assembler before it can run; machine code runs directly.
Assembly lets you use labels (e.g. loop:) and symbolic names instead of absolute binary addresses, which makes programs far easier to read and maintain.

Machine code = binary; the CPU runs it directly.
Assembly language = mnemonics, low-level, one-to-one with machine code.
An assembler translates assembly → machine code.
Assembly allows labels/symbolic addresses; machine code uses absolute binary addresses.

Instruction format: opcode + operand

Every instruction has an operation and the thing it operates on.

Each assembly instruction is made of two parts:

Opcode — the operation to perform (the verb), e.g. ADD, LDD, JMP.
Operand — what the operation acts on: a value, an address, or a register.

ADD   200
└┬─┘  └┬─┘
opcode operand

The 9618 machine model uses:

ACC — the single general-purpose Accumulator register where calculations happen.
IX — the Index Register used by indexed addressing.
Number notation in operands: # = denary (e.g. #123), B = binary (e.g. B01001010), & = hex (e.g. &4A).

The same value can be written three ways: #74, B01001010 and &4A all mean the denary number 74.

Instruction = opcode (operation) + operand (data/address/register).
ACC = accumulator (calculations); IX = index register.
denary, B binary, & hex — three notations for the same number.

The instruction groups

Data movement, I/O, arithmetic, jumps (conditional/unconditional) and compare.

The 9618 instruction set is organised into groups. You should recognise each instruction and what it does.

Data movement

Instruction	Effect
LDM #n	load value n into ACC (immediate)
LDD	load contents of into ACC (direct)
LDI	load using the address held at (indirect)
LDX	load contents of ( + IX) into ACC (indexed)
LDR #n	load value n into IX
MOV	copy ACC into the given register (e.g. IX)
STO	store ACC into

A conditional jump (JPE/JPN) depends on the result of the most recent CMP; an unconditional jump (JMP) always happens.

Data movement: LDM/LDD/LDI/LDX/LDR/MOV/STO.
I/O: IN (ASCII → ACC), OUT (ACC → character).
Arithmetic: ADD, SUB, INC, DEC.
Compare/jump: CMP, CMI; JMP (always), JPE (True), JPN (False); END.

Addressing modes

Five ways the operand tells the CPU where to find the data.

An addressing mode describes how the operand should be interpreted. The 9618 set uses five.

Mode	Example	Where the data comes from	Memory accesses
Immediate	LDM #10	the operand IS the data (10)	none
Direct	LDD 200	contents of the stated address	one
Indirect	LDI 200	contents of the address held at the operand (pointer)	two
Indexed	LDX 200	contents of (operand + IX)	one (after computing the address)
Relative	(offset)	current instruction's address + offset	—

The diagram below contrasts the three you trace most often — immediate, direct and indirect — for the operand 100:

Immediate LDM #100 ACC = 100 value used directly

Direct LDD 100 [100] = 55 ACC = 55

Indirect LDI 100 [100] = 150 [150] = 77 ACC = 77

Indexed addressing is how you process a list: the effective address is operand + contents of IX, so increasing IX (with INC IX) moves you to the next item. Relative addressing uses an offset from the current instruction's address, which makes the code relocatable (it works wherever it is loaded in memory).

Immediate (#): operand is the data; no memory access.
Direct: contents of the stated address (one lookup).
Indirect: operand holds a pointer → follow it (two lookups).
Indexed: effective address = operand + IX (steps through lists).
Relative: current address + offset → relocatable code.

See the full worked example for assembly language →

The two-pass assembly process

Pass 1 builds the symbol table; pass 2 generates the machine code.

An assembler converts the source program into machine code. Most assemblers read the program twice — a two-pass assembler — to deal with forward references (a label used in a jump before it is defined).

Pass 1 — build the symbol table

Read through the whole program.
For every label, record the memory address it represents in a symbol table.
Check the mnemonics are valid; do not yet finalise code for unresolved labels.

Pass 2 — generate the machine code

Read the program again.
Translate each mnemonic into its binary opcode.
Replace each label/operand with the actual address, looked up from the symbol table built in pass 1.
Output the finished machine-code program.

Example symbol table for a program where loop sits at address 1 and done at address 6:

Label	Address
loop	1
done	6

Because pass 1 has already recorded every label's address, pass 2 can resolve forward jumps that point to labels defined later in the program.

Two passes handle forward references (label used before defined).
Pass 1: build the symbol table (label → address).
Pass 2: generate machine code, substituting addresses for labels.
Result: all labels resolved into absolute addresses.

Tracing a program with a trace table

Track every changing value, row by row, to follow execution.

To trace a program you record the value of each changing item (ACC, IX, relevant memory addresses, the compare result, whether a jump is taken) after each instruction.

Consider this loop that counts up to 3:

      LDM #0
loop: INC ACC
      CMP #3
      JPN loop
      STO 90
      END

Trace table:

Instruction	ACC	Compare	Jump?
LDM #0	0	—	—
INC ACC	1	—	—
CMP #3	1	False	—
JPN loop	1	—	yes
INC ACC	2	—	—
CMP #3	2	False	—
JPN loop	2	—	yes
INC ACC	3	—	—
CMP #3	3	True	—
JPN loop	3	—	no
STO 90	3	—	—

The loop body runs 3 times; the program then stores 3 into address 90 and ends. A clear trace table earns method marks even if you make one slip, so always draw one.

List a column for each changing value (ACC, IX, addresses, compare, jump).
Fill in one row per instruction executed.
JPN jumps on False, JPE jumps on True — record the compare result.
Trace tables earn method marks even with a small error.

See the full worked example for assembly language →

Quick recap

Assembly = low-level mnemonics, ~one-to-one with machine code; an assembler translates it.
Each instruction = opcode (operation) + operand (data/address/register).
Instruction groups: data movement, I/O, arithmetic, compare, unconditional & conditional jumps.
Five addressing modes: immediate (#), direct, indirect (pointer), indexed (+IX), relative (+offset).
Two-pass assembler: pass 1 builds the symbol table; pass 2 generates code, resolving labels.
JMP always jumps; JPE jumps if the compare was True; JPN jumps if it was False.
Trace programs with a trace table — one column per changing value — to earn method marks.

Memorise this

Verbatim phrases and definitions Cambridge mark schemes credit.

Assembly = mnemonics, low-level, one-to-one with machine code; needs an assembler.
Opcode = operation; operand = the value/address/register it acts on.
Immediate (#) = value directly; direct = contents of address; indirect = follow pointer (two lookups).
Indexed effective address = operand + contents of IX; relative = current address + offset (relocatable).
Two-pass assembler: pass 1 builds symbol table (label→address), pass 2 generates machine code.
JMP always; JPE jumps if True; JPN jumps if False.
IN stores ASCII in ACC; OUT prints the character for the ASCII in ACC.

How it’s examined

Section 4.2 is assessed in Paper 1 (Theory Fundamentals, 1 h 30 min, 75 marks) — written, externally assessed, no calculator. Expect a program trace with a trace table (state final ACC / memory contents), 'state the value loaded' questions that test the addressing modes, a 'describe the two-pass assembly process / symbol table' question, and short definitions (opcode, operand, assembler). Always draw the trace table — method marks are available even if a final value is wrong.

Sources: Cambridge International AS & A Level Computer Science 9618 syllabus (2027-2029), section 4.2. Last reviewed 2026-06-21.

Take this whole topic with you

Step-by-step worked examples — Assembly Language

Step-by-step solutions to past-paper-style questions on assembly language, written exactly the way a tutor would explain them at the board.

Question type:

1Load a value and store it elsewhere
Getting startedMulti-step problem• 9618 Paper 1 style• data movement, LDD, STO, AO2
Question
The contents of memory are shown below. Trace the program and state the final contents of address 100 and the ACC. (3 marks)

LDD 200 STO 100 END

Address Contents
100 5
200 42
Step-by-step solution
1. Step 1
  LDD 200 is direct addressing: load the contents of address 200 into the ACC. The contents of 200 are 42, so ACC = 42.
2. Step 2
  STO 100 stores the contents of the ACC into address 100. ACC is 42, so address 100 now holds 42 (the old value 5 is overwritten).
3. Step 3
  END returns control to the operating system.
Answer
ACC = 42 and address 100 = 42.
Examiner tip
Direct addressing (LDD) loads the contents of the named address, not the address number itself. 1 mark for ACC = 42, 1 mark for address 100 = 42, 1 mark for showing the trace/working.
2Immediate addressing with ADD #n
Getting startedMulti-step problem• 9618 Paper 1 style• immediate, LDM, ADD, arithmetic, AO2
Question
Trace the following program and give the final value in the ACC. Numbers prefixed with # are denary. (3 marks)

LDM #10 ADD #7 SUB #3 END
Step-by-step solution
1. Step 1
  LDM #10 is immediate addressing: load the actual value 10 into the ACC (not the contents of an address). ACC = 10.
2. Step 2
  ADD #7 adds the immediate value 7 to the ACC.
  $ACC = 10 + 7 = 17$
3. Step 3
  SUB #3 subtracts the immediate value 3 from the ACC.
  $ACC = 17 - 3 = 14$
Answer
Final ACC = 14.
Examiner tip
The # symbol means 'use this value directly'. LDM #10 puts 10 in the ACC; LDD 10 would instead load whatever is stored at address 10. Mixing these up is the single most common error in this topic.
3Trace a counting loop with a trace table
Building confidenceMulti-step problem• 9618 Paper 1 style• loop, CMP, JPN, INC, trace table, AO2
Question
Complete a trace table for the program below and state how many times the loop body runs. Show the value of the ACC after each instruction. (5 marks)

LDM #0 loop: INC ACC CMP #3 JPN loop STO 90 END
Step-by-step solution
1. Step 1
  LDM #0 sets ACC = 0. Then INC ACC adds 1 (ACC = 1). CMP #3 compares 1 with 3 → not equal (False). JPN loop jumps because the last compare was False.
2. Step 2
  Second pass: INC ACC → ACC = 2. CMP #3 → 2 ≠ 3 (False). JPN loop jumps again.
3. Step 3
  Third pass: INC ACC → ACC = 3. CMP #3 → 3 = 3 (True). JPN loop does NOT jump (it only jumps when the compare is False).
4. Step 4
  STO 90 stores ACC (3) into address 90, then END. The trace table below records the ACC after each instruction.
5. Step 5
  Trace table:
  
  Instruction ACC Compare result Jump?
  LDM #0 0 — —
  INC ACC 1 — —
  CMP #3 1 False —
  JPN loop 1 — yes
  INC ACC 2 — —
  CMP #3 2 False —
  JPN loop 2 — yes
  INC ACC 3 — —
  CMP #3 3 True —
  JPN loop 3 — no
  STO 90 3 — —
Answer
The loop body (INC ACC) runs 3 times; final ACC = 3 and address 90 = 3.
Examiner tip
JPN jumps when the last compare was FALSE; JPE jumps when it was TRUE. A clear trace table with a column per changing value is the safest way to earn the method marks even if you slip on one row.
4Indexed addressing to read a list
Building confidenceMulti-step problem• 9618 Paper 1 style• indexed, LDX, IX, LDR, trace table, AO2
Question
The Index Register (IX) and memory are shown. Trace the program and state the contents of the ACC after each LDX instruction. (4 marks)

LDR #1 LDX 200 INC IX LDX 200 END

Address Contents
200 11
201 22
202 33

IX starts at an unknown value (it is set by the program).
Step-by-step solution
1. Step 1
  LDR #1 loads the immediate value 1 into the Index Register, so IX = 1.
2. Step 2
  LDX 200 is indexed addressing: the address used is the operand plus the contents of IX, i.e. 200 + 1 = 201. Load the contents of 201 → ACC = 22.
  $\text{effective address} = 200 + IX = 200 + 1 = 201$
3. Step 3
  INC IX adds 1 to the Index Register, so IX = 2.
4. Step 4
  LDX 200 again: effective address = 200 + 2 = 202. Load the contents of 202 → ACC = 33.
  $\text{effective address} = 200 + IX = 200 + 2 = 202$
Answer
After the first LDX, ACC = 22 (from address 201). After INC IX and the second LDX, ACC = 33 (from address 202). Indexed addressing lets one instruction step through a list by changing IX.
Examiner tip
The effective address in indexed addressing is operand + contents of IX. Show the addition each time. INC IX increases the Index Register (not the ACC) — read the operand of INC carefully.
5Indirect addressing with LDI
StretchMulti-step problem• 9618 Paper 1 style• indirect, LDI, pointer, AO2
Question
Using the memory contents below, trace the program and state the final value in the ACC. Explain in one sentence what indirect addressing did. (4 marks)

LDI 100 END

Address Contents
100 150
150 77
200 99
Step-by-step solution
1. Step 1
  LDI 100 is indirect addressing. First read the contents of address 100, which is 150. This 150 is itself an address (a pointer), not the data.
2. Step 2
  Now go to address 150 and load its contents into the ACC. The contents of 150 are 77, so ACC = 77.
  $100 \rightarrow \text{contents } 150 \rightarrow \text{go to } 150 \rightarrow \text{contents } 77$
3. Step 3
  Indirect addressing therefore needed two memory accesses: the named address held the address of the actual data.
Answer
Final ACC = 77. Indirect addressing used the contents of address 100 (150) as a pointer to the real data held at address 150.
Examiner tip
Indirect addressing = 'the address to use is held at the operand'. Two lookups are required: operand → pointer → data. A frequent error is stopping at the first lookup and giving 150 as the answer.

Address	Contents
100	5
200	42

Address	Contents
200	11
201	22
202	33

Address	Contents
100	150
150	77
200	99

6Full program trace — sum a list with an indexed loop

StretchMulti-step problem• 9618 Paper 1 style• trace table, loop, LDX, IX, ADD, CMP, JPN, STO, AO2

Question

The program below adds together the three numbers stored at addresses 200-202 and stores the running total at address 90. A counter is kept at address 91. Complete a trace table showing the ACC, the Index Register (IX) and the contents of addresses 90 and 91 after each loop iteration, then state the final contents of address 90. (7 marks)

      LDM #0
      STO 90
      STO 91
      LDR #0
loop: LDX 200
      ADD 90
      STO 90
      INC IX
      LDD 91
      INC ACC
      STO 91
      CMP #3
      JPN loop
      END

Memory:

Address	Contents
90	0
91	0
200	11
201	22
202	33

Step-by-step solution

Step 1
Initialise. LDM #0 puts 0 in the ACC; STO 90 sets the running total (address 90) to 0 and STO 91 sets the counter (address 91) to 0. LDR #0 sets IX = 0 so the first indexed read is from address 200 + 0 = 200.
Step 2
First loop pass (IX = 0). LDX 200 uses effective address 200 + 0 = 200 → ACC = 11. ADD 90 adds the running total (0): ACC = 11 + 0 = 11; STO 90 writes 11 to address 90. INC IX → IX = 1. LDD 91 loads the counter (0), INC ACC → 1, STO 91 writes 1 to address 91. CMP #3: 1 ≠ 3 (False) so JPN loop jumps.
$\text{effective address} = 200 + IX = 200 + 0 = 200$
Step 3
Second loop pass (IX = 1). LDX 200 → effective address 200 + 1 = 201 → ACC = 22. ADD 90 adds the running total 11: ACC = 22 + 11 = 33; STO 90 writes 33. INC IX → IX = 2. The counter becomes 2 (LDD 91/INC ACC/STO 91). CMP #3: 2 ≠ 3 (False) so JPN loop jumps again.
$ACC = 22 + 11 = 33$
Step 4
Third loop pass (IX = 2). LDX 200 → effective address 200 + 2 = 202 → ACC = 33. ADD 90 adds the running total 33: ACC = 33 + 33 = 66; STO 90 writes 66. INC IX → IX = 3. The counter becomes 3. CMP #3: 3 = 3 (True) so JPN loop does NOT jump and the loop ends.
$ACC = 33 + 33 = 66$

Step 5

Trace table (showing the key register/memory values as each loop iteration completes):

Pass	IX	LDX value	Running total in ACC	Address 90	Address 91 (counter)	CMP #3 → jump?
init	0	—	0	0	0	—
1	0 → 1	11 (addr 200)	11	11	1	False → jump
2	1 → 2	22 (addr 201)	33	33	2	False → jump
3	2 → 3	33 (addr 202)	66	66	3	True → exit

Answer

The program sums 11 + 22 + 33 = 66 and stores the total at address 90, so the final contents of address 90 = 66. Indexed addressing (effective address = 200 + IX) steps through the list while the counter at address 91 controls the three iterations.

Examiner tip

This is a full-program trace at the top of the mark range: 1 mark per correct row of the trace table, plus marks for the effective-address calculations (200 + IX) and the final total. Keep separate columns for IX, the value loaded by LDX, the running total (address 90) and the counter (address 91) — the running total lives in memory, so it must be re-read by ADD 90 each pass. The single most common slip is forgetting to add IX to the operand of LDX.

Model Answers — Assembly Language

High-scoring sample answers for assembly language on the Cambridge IGCSE paper, with examiner-style notes mapping each response to the mark scheme and assessment objectives.

Question 1
9618 Paper 1 style2 marks
State two differences between assembly language and machine code. (2 marks)
Model answer
Difference 1: Machine code is written in binary (the only form the processor can execute directly), whereas assembly language uses mnemonics such as LDD, ADD and JMP that are easier for a human to read and write.

Difference 2: Assembly language must be translated into machine code by an assembler before it can run, whereas machine code requires no translation and can be executed directly by the CPU.
Why this scores
1 mark per valid difference. Acceptable points: mnemonics vs binary; needs an assembler vs runs directly; uses labels/symbolic addresses vs absolute binary addresses. There is broadly a one-to-one relationship between an assembly instruction and a machine-code instruction — say this, not 'assembly is high-level' (it is low-level).
Question 2
9618 Paper 1 style3 marks
An assembly language instruction is made of two parts. Name each part and state what it does, using the instruction ADD 200 as an example. (3 marks)
Model answer
An instruction has an opcode and an operand.

Opcode — the operation to perform. In ADD 200 the opcode is ADD, which tells the processor to add.

Operand — the data the operation works on, or the address of that data. In ADD 200 the operand is 200, the address whose contents are added to the ACC.
Why this scores
1 mark for naming each part, 1 mark for relating both correctly to the example. Note the operand can be a value (e.g. #200 immediate) or an address (200 direct) depending on the addressing mode — strong answers mention this.
Question 3
9618 Paper 1 style4 marks
Explain why a two-pass assembler is used to translate an assembly language program that contains labels for jumps. (4 marks)
Model answer
A program can use a label (e.g. loop:) in a jump instruction before that label has been defined — this is a forward reference. On a single pass the assembler would not yet know the address the label stands for.

Pass 1: The assembler reads through the whole program and builds a symbol table, recording the memory address that each label corresponds to. It does not yet generate the final code for unresolved jumps.

Pass 2: The assembler reads the program a second time and now generates the machine code, replacing every label with the actual address looked up from the symbol table.

Using two passes therefore guarantees that all labels — including forward references — have known addresses before the final machine code is produced.
Why this scores
Marks for: forward reference problem (1); pass 1 builds a symbol table of labels→addresses (1); pass 2 generates code substituting the addresses (1); result is all labels resolved (1). The phrase 'symbol table' is the high-value term examiners reward.
Question 4
9618 Paper 1 style4 marks
(a) Describe what is meant by relative addressing. (b) State one advantage of using relative addressing for a jump instruction. (4 marks)
Model answer
(a) In relative addressing, the operand is not an absolute address but an offset — a number that is added to the address of the current instruction (the value in the program counter) to work out the actual address to use. For example, an offset of +3 means 'the instruction 3 places further on'.

(b) Because the operand is an offset rather than a fixed address, the same code works wherever it is loaded in memory — the program is relocatable. This makes it easy to move a block of code to a different part of memory without rewriting the jump addresses.
Why this scores
(a) up to 2 marks: offset added to the current/PC address to give the effective address. (b) up to 2 marks: relocatable code / position-independent / can be loaded anywhere without changing the jumps. Don't confuse relative (offset from current instruction) with indexed (offset from the operand using IX).
Question 5
9618 Paper 1 style5 marks
Trace the program below using a trace table, showing the ACC and the contents of address 80 after each instruction. State the final contents of address 80. Memory: address 50 holds 6, address 80 holds 0. (5 marks)
```
LDD 50
ADD #4
STO 80
END
```
Model answer

Instruction ACC Address 80
(start) — 0
LDD 50 6 0
ADD #4 10 0
STO 80 10 10
END 10 10

Working: LDD 50 loads the contents of address 50 (which is 6) into the ACC. ADD #4 adds the immediate value 4, giving ACC = 10. STO 80 copies the ACC into address 80, so address 80 = 10.

Final contents of address 80 = 10.
Why this scores
Up to 3 marks for correct trace-table values (allow follow-through if an early row is wrong but later steps are consistent), 1 mark for the final answer, 1 mark for clear working. Distinguish LDD 50 (contents of 50) from LDM #50 (the value 50 itself).
Question 6
9618 Paper 1 style6 marks
Address 60 contains the value 70, and address 70 contains the value 25. For each instruction below, state the value loaded into the ACC. Explain your answer for the indirect case. (a) LDM #60 (b) LDD 60 (c) LDI 60 (6 marks)
Model answer
(a) LDM #60 → ACC = 60. Immediate addressing loads the actual operand value (60) straight into the ACC; no memory is read.

(b) LDD 60 → ACC = 70. Direct addressing loads the contents of address 60, which is 70.

(c) LDI 60 → ACC = 25. Indirect addressing reads the contents of address 60 (= 70) and treats that as a pointer — an address. It then loads the contents of address 70 (= 25) into the ACC. Two memory accesses are needed: operand → 60 → contents 70 → go to 70 → contents 25.
Why this scores
2 marks per part (value + correct reason). The grid 60→70→25 deliberately tests whether students follow the pointer in (c). A common error is giving 70 for the indirect case (stopping after one lookup) — full marks require following the pointer to the final data.

Instruction	ACC	Address 80
(start)	—	0
LDD 50	6	0
ADD #4	10	0
STO 80	10	10
END	10	10

Key Definitions and Keywords — Assembly Language

Definitions to memorise and the exact keywords mark schemes credit for assembly language answers — sharpened from recent examiner reports for the 2026 Cambridge IGCSE sitting.

Assembly language
Examiner keyword
A low-level programming language that uses mnemonics (e.g. LDD, ADD, JMP) to represent machine-code instructions. It has (broadly) a one-to-one relationship with machine code and must be translated by an assembler.
Machine code
Examiner keyword
The binary instructions that a processor can execute directly. Each machine-code instruction corresponds to one assembly-language instruction.
Opcode (operation code)
Examiner keyword
The part of an instruction that specifies the operation to be carried out, e.g. ADD, LDD, JMP. It is the verb of the instruction.
Operand
Examiner keyword
The part of an instruction that the opcode acts on. It can be an actual value (immediate), an address whose contents are used, or a register name, depending on the addressing mode.
Example
In ADD 200 the operand is 200 (an address); in ADD #200 it is the value 200.
Assembler
Examiner keyword
A program that translates assembly language into machine code, resolving mnemonics, symbolic addresses and labels into binary instructions and absolute addresses.
Two-pass assembler
Examiner keyword
An assembler that reads the source program twice: pass 1 builds a symbol table of labels and their addresses; pass 2 generates the machine code, replacing labels with their resolved addresses (handling forward references).
Symbol table
Examiner keyword
A table built by the assembler during pass 1 that records each label/symbol and the memory address it corresponds to, so labels can be replaced by addresses in pass 2.
Immediate addressing
Examiner keyword
An addressing mode where the operand is the actual value to use (shown with #, e.g. LDM #10 loads the value 10). No memory access is needed for the data.
Direct addressing
Examiner keyword
An addressing mode where the operand is the address of the data; the contents of that address are used (e.g. LDD 200 loads the contents of address 200).
Indirect addressing
Examiner keyword
An addressing mode where the operand gives an address that holds another address (a pointer); the data is found at that second address. Two memory accesses are required (e.g. LDI 100).
Indexed addressing
Examiner keyword
An addressing mode where the effective address is the operand plus the contents of the Index Register (IX). Changing IX lets one instruction step through a list (e.g. LDX 200).
Relative addressing
Examiner keyword
An addressing mode where the operand is an offset added to the address of the current instruction (the program counter) to give the effective address. It makes code relocatable.

Common Mistakes and Misconceptions — Assembly Language

The traps other students keep falling into on assembly language questions — taken from recent Cambridge IGCSE examiner reports and mark schemes — and how to avoid them.

✕Confusing immediate (#) with direct addressing — e.g. treating LDM #10 as 'load the contents of address 10'.
Examiner reports consistently flag immediate/direct confusion as the most common trace error.
Why it happens
The # symbol is easy to overlook, and beginners assume every operand is an address.
How to avoid it
Read the # carefully: LDM #10 puts the value 10 into the ACC; LDD 10 loads whatever is stored at address 10. Underline the # before tracing.
✕Stopping after one lookup in indirect addressing, giving the pointer value instead of the data.
Why it happens
Students treat LDI like LDD and read only the first address's contents.
How to avoid it
Remember indirect needs TWO accesses: operand → contents (a pointer) → go to that pointer → contents (the data). Follow the arrow twice.
✕Swapping JPE and JPN — jumping when the compare was True for JPN, or False for JPE.
A frequently penalised slip that makes the whole loop trace wrong.
Why it happens
The letters are similar and the True/False rule is easily forgotten under time pressure.
How to avoid it
JPE = jump if compare is truE; JPN = jump if Not true (False). Write the rule at the top of your trace.
✕Applying INC/DEC to the wrong register — e.g. incrementing the ACC when the instruction said INC IX.
Why it happens
The operand of INC/DEC names the register, and students skim past it.
How to avoid it
Check the operand of INC/DEC every time: INC ACC changes the ACC, INC IX changes the Index Register used by indexed addressing.
✕In indexed addressing, forgetting to add the Index Register, so LDX 200 is treated as LDD 200.
Why it happens
Students don't track the value of IX or assume it is zero.
How to avoid it
Effective address = operand + contents of IX. Always write the addition out (e.g. 200 + 2 = 202) and keep an IX column in your trace table.
✕Tracing 'in your head' and writing only a final answer, with no trace table.
Examiner reports note that answers without a trace table lose easy method marks.
Why it happens
Short programs look simple, so students skip the working.
How to avoid it
Always draw a trace table with a column per changing value (ACC, IX, key addresses, compare result, jump?). Method marks are available even if the final value is wrong.

Assembly Language

Detailed Study Notes

At a glance

What you’ll learn

denary, B binary, & hex — three notations for the same number.

Quick recap

Memorise this

How it’s examined

Take this whole topic with you

1Load a value and store it elsewhere

2Immediate addressing with ADD #n

3Trace a counting loop with a trace table

4Indexed addressing to read a list

5Indirect addressing with LDI

6Full program trace — sum a list with an indexed loop

Assembly language

Machine code

Opcode (operation code)

Operand

Assembler

Two-pass assembler

Symbol table

Immediate addressing

Direct addressing

Indirect addressing

Indexed addressing

Relative addressing

✕Confusing immediate (#) with direct addressing — e.g. treating LDM #10 as 'load the contents of address 10'.

✕Stopping after one lookup in indirect addressing, giving the pointer value instead of the data.

✕Swapping JPE and JPN — jumping when the compare was True for JPN, or False for JPE.

✕Applying INC/DEC to the wrong register — e.g. incrementing the ACC when the instruction said INC IX.

✕In indexed addressing, forgetting to add the Index Register, so LDX 200 is treated as LDD 200.

✕Tracing 'in your head' and writing only a final answer, with no trace table.

✕Confusing immediate (#) with direct addressing — e.g. treating `LDM #10` as 'load the contents of address 10'.

✕Applying INC/DEC to the wrong register — e.g. incrementing the ACC when the instruction said `INC IX`.

✕In indexed addressing, forgetting to add the Index Register, so `LDX 200` is treated as `LDD 200`.