Why is "Swapping AND and OR — e.g. giving output 1 for the 11 row only when describing OR, or 1 for any input being 1 when describing AND." a common mistake in Logic Gates and Logic Circuits?

Why it happens: Everyday English uses 'and'/'or' loosely, so students don't anchor to the precise rule. How to avoid it: Memorise: AND output is 1 only when ALL inputs are 1; OR output is 1 when AT LEAST ONE input is 1. Source: Examiner reports note frequent confusion of AND/OR conditions in truth-table questions.

Why is "Leaving out input rows or listing them out of order in a truth table (e.g. only 6 of the 8 rows for a 3-input circuit)." a common mistake in Logic Gates and Logic Circuits?

Why it happens: Students write rows from memory rather than counting systematically, so combinations get skipped or duplicated. How to avoid it: Always write 2^n rows in strict binary counting order (000, 001, 010, …, 111). Check the row count before filling outputs.

Why is "Confusing NAND with NOR, or forgetting they are the INVERSES of AND and OR." a common mistake in Logic Gates and Logic Circuits?

Why it happens: The names sound similar and the symbols differ only by an inversion bubble. How to avoid it: Remember: NAND = NOT(AND) (1 unless both inputs are 1); NOR = NOT(OR) (1 only when both inputs are 0).

Why is "Treating XOR the same as OR — giving output 1 for the 11 row." a common mistake in Logic Gates and Logic Circuits?

Why it happens: XOR and OR agree on three of four rows, so the 11 case is overlooked. How to avoid it: XOR = 1 only when inputs DIFFER. For the 11 row (inputs the same), XOR output is 0.

Why is "Writing an ambiguous expression such as A.B+C without brackets, or evaluating OR before AND." a common mistake in Logic Gates and Logic Circuits?

Why it happens: Students forget that AND binds tighter than OR (like × before +). How to avoid it: Evaluate NOT first, then AND, then OR. Use brackets — (A.B) + C — to make precedence explicit.

Why is "Misreading a gate symbol by ignoring the inversion bubble, e.g. calling a NAND gate 'AND' or a NOR gate 'OR'." a common mistake in Logic Gates and Logic Circuits?

Why it happens: The bubble is small and easy to overlook when scanning a circuit quickly. How to avoid it: Check every output for a bubble: a bubble means the basic gate's output is inverted (AND→NAND, OR→NOR).

Cambridge International A Levels Computer Science (9618)

Logic Gates and Logic Circuits

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Detailed Study Notes

Detailed notes on Hardware for Cambridge International A Levels Computer Science, covering key concepts, explanations, examples, and exam-focused revision points.

Logic Gates and Logic Circuits — Cambridge AS & A Level Computer Science 9618 Study Notes (2027-2029)

The six logic gates (NOT, AND, OR, NAND, NOR, XOR), their symbols and truth tables, and how to move freely between a problem statement, a logic circuit, a truth table and a Boolean expression. Notation: A.B for AND, A+B for OR, and Ā (or NOT A) for NOT. All Paper 1 work is done by hand — no calculator.

At a glance

There are six gates to know: NOT, AND, OR, NAND, NOR, XOR (EOR).
Only NOT has one input; every other gate has exactly two inputs.
AND = 1 only when both inputs are 1; OR = 1 when at least one is 1.
NAND = NOT(AND), NOR = NOT(OR) — add an inversion bubble to the output.
XOR = 1 when the inputs differ (and 0 when they are the same).
Notation: A.B = AND, A+B = OR, Ā / NOT(A) = NOT.
A truth table with n inputs has 2^n rows, listed in binary order.
You must convert between problem ⇄ circuit ⇄ truth table ⇄ expression in any direction.
Operator precedence: do NOT first, then AND, then OR (use brackets to be safe).

What you’ll learn

Mapped to the Cambridge International A Level 9618 syllabus (2027-2029).

3.2 — Recognise and use the standard symbols for the logic gates NOT, AND, OR, NAND, NOR and XOR (EOR).
3.2 — Define the function of each of the six logic gates, including the binary output produced from all possible binary inputs.
3.2 — Construct the truth table for each of the six logic gates.
3.2 — Construct a logic circuit from a problem statement, a logic expression or a truth table.
3.2 — Construct a truth table from a problem statement, a logic circuit or a logic expression.
3.2 — Construct a logic expression from a problem statement, a logic circuit or a truth table.

What a logic gate is

A gate takes binary inputs and produces one binary output by a fixed rule.

A logic gate is an electronic building block that takes one or more binary inputs (each 0 or 1) and produces a single binary output (0 or 1) according to a fixed logical rule. Gates are how a computer makes decisions in hardware.

There are six gates in the 9618 syllabus:

Gate	Inputs	Output is 1 when…
NOT	1	the input is 0 (it inverts)
AND	2	both inputs are 1
OR	2	at least one input is 1
NAND	2	NOT both inputs are 1
NOR	2	both inputs are 0
XOR (EOR)	2	the inputs are different

Important: only the NOT gate has a single input. Every other gate has exactly two inputs.

Throughout these notes we use a consistent notation: A.B means A AND B, A+B means A OR B, and Ā (a bar over A) or NOT(A) means NOT A.

A gate: binary input(s) → one binary output by a fixed rule.
Six gates: NOT, AND, OR, NAND, NOR, XOR.
NOT has 1 input; all others have exactly 2 inputs.
Notation: A.B = AND, A+B = OR, Ā / NOT(A) = NOT.

The gate symbols

Learn the distinctive shapes; a bubble on the output means 'invert'.

You must recognise and draw the standard (distinctive-shape) symbols. The three shapes to learn are:

NOT — a triangle with a small bubble on the tip.
AND — a flat-backed D shape.
OR — a curved-back shape coming to a point.

Adding an inversion bubble to the output of AND or OR creates NAND and NOR. XOR looks like OR with an extra curved line across the inputs.

AND

NAND

NOR

XOR

The key visual tells: a bubble = inversion, a flat back = AND family, a curved back = OR family, and an extra input curve = XOR.

NOT = triangle + bubble; AND = flat-backed D; OR = curved-back point.
Bubble on output: AND→NAND, OR→NOR.
XOR = OR shape with an extra curved line across the inputs.
Flat back = AND family; curved back = OR/XOR family.

The six truth tables

Memorise the output column for each gate; XOR = 1 when inputs differ.

A truth table lists every input combination and the matching output. A gate with n inputs has 2^n rows (so a 2-input gate has 4 rows).

NOT (one input):

A	NOT A
0	1
1	0

AND, OR, NAND, NOR, XOR (two inputs) — here are all five side by side:

A	B	A.B (AND)	A+B (OR)	NAND	NOR	XOR
0	0	0	0	1	1	0
0	1	0	1	1	0	1
1	0	0	1	1	0	1
1	1	1	1	0	0	0

Read each column carefully:

AND is 1 only in the 11 row.
OR is 1 except in the 00 row.
NAND is the exact opposite of AND (1 everywhere AND is 0).
NOR is the exact opposite of OR (1 only in the 00 row).
XOR is 1 in the two rows where the inputs differ (01 and 10).

n inputs → 2^n rows; 2-input gate has 4 rows.
AND = 1 only for 11; OR = 1 except for 00.
NAND = inverse of AND; NOR = inverse of OR.
XOR = 1 for 01 and 10 (inputs differ).

See the full worked example for logic gates and logic circuits →

Boolean expressions and circuits

Translate between expression and circuit; respect NOT→AND→OR order.

A logic expression describes a circuit algebraically using . (AND), + (OR) and the bar / NOT (inversion).

Operator precedence (which to do first) matters, just like in arithmetic:

NOT (innermost)
AND (.)
OR (+)

So in $X = (A.B) + C$ , the AND is evaluated before the OR. Always use brackets to make this explicit.

From expression to circuit: build inside-out. For $X = \overline{A}.B + C$ :

Pass A through a NOT gate to get $\overline{A}$ .
Feed $\overline{A}$ and B into an AND gate to get $\overline{A}.B$ .
Feed that result and C into an OR gate — its output is X.

From circuit to expression: trace from the inputs forward, labelling each gate's output, and combine them. Reverse the steps above to read $X = (\overline{A}.B) + C$ straight off the diagram.

Precedence: NOT, then AND, then OR.
Use brackets: (A.B) + C, never an ambiguous A.B+C.
Expression→circuit: build inside-out (NOT, then AND, then OR).
Circuit→expression: label each gate output and combine.

See the full worked example for logic gates and logic circuits →

From a worded problem to logic

Translate 'all/both' → AND, 'either/any' → OR, 'not' → NOT.

Exam questions often give a problem statement and ask for the expression, circuit and/or truth table. The skill is translating English into logic:

Wording	Logic
"both X and Y", "all conditions"	AND (.)
"either X or Y", "at least one"	OR (+)
"not", "is off", "is closed"	NOT (bar)
"exactly one but not both"	XOR

Worked translation. An alarm X sounds when window A is open AND system B is armed, OR when panic button C is pressed (regardless of A and B).

"A open AND B armed" → $A.B$
"OR panic C" → $+\,C$
Combine: $X = (A.B) + C$

Then build the truth table by listing all $2^3 = 8$ rows in binary order and computing X for each:

A	B	C	A.B	X = (A.B)+C
0	0	0	0	0
0	0	1	0	1
0	1	0	0	0
0	1	1	0	1
1	0	0	0	0
1	0	1	0	1
1	1	0	1	1
1	1	1	1	1

Notice C=1 forces X=1 on its own — a quick sanity check that your translation is right.

'Both/all' → AND; 'either/any' → OR; 'not/off' → NOT.
'Exactly one but not both' → XOR.
Write the expression, then build the 2^n-row truth table.
Use intermediate columns (e.g. A.B) to avoid errors.

See the full worked example for logic gates and logic circuits →

Exam strategy: moving between the four forms

Problem ⇄ circuit ⇄ truth table ⇄ expression — practise every direction.

Section 3.2 tests your ability to convert in any direction between four representations: a problem statement, a logic circuit, a truth table and a logic expression. Here is a reliable routine for each move:

Anything → truth table: list $2^n$ input rows in binary order, add an intermediate column per gate, then fill the output.
Circuit → expression: trace from inputs to output, naming each gate's output as you go.
Expression → circuit: build inside-out following NOT → AND → OR precedence.
Problem → expression: translate the keywords (and/or/not) into . / + / bar.
Truth table → expression: look at the rows where the output is 1 and describe them (e.g. "1 only when A=1 and B=1" → $A.B$ ); look out for an input that makes no difference so it can be dropped.

Top discipline points:

Always write the correct number of rows ( $2^n$ ) in binary order — never skip combinations.
Keep brackets in expressions to show precedence.
Check every gate symbol for an inversion bubble.
Use a quick sanity check (e.g. does a single dominant input behave as expected?).

Convert in all directions: problem ⇄ circuit ⇄ table ⇄ expression.
To a table: 2^n rows in binary order + intermediate columns.
Circuit→expression: label gate outputs as you trace.
Truth table→expression: read the output-1 rows; drop irrelevant inputs.

See the full worked example for logic gates and logic circuits →

Quick recap

Six gates: NOT (1 input) and AND, OR, NAND, NOR, XOR (2 inputs each).
AND = 1 only for 11; OR = 1 except 00; XOR = 1 when inputs differ.
NAND = NOT(AND); NOR = NOT(OR) — shown by an inversion bubble.
Notation: A.B (AND), A+B (OR), Ā / NOT(A) (NOT).
A truth table has 2^n rows, listed in binary order.
Build circuits inside-out: NOT, then AND, then OR; keep brackets.
Translate problems: and→AND, or→OR, not→NOT, 'exactly one'→XOR.
Convert freely between problem, circuit, truth table and expression.

Memorise this

Verbatim phrases and definitions Cambridge mark schemes credit.

Only NOT has one input; all other gates have exactly two.
AND = 1 only when both inputs are 1.
OR = 1 when at least one input is 1.
NAND = NOT(AND); NOR = NOT(OR).
XOR = 1 when the two inputs are different.
Notation: A.B = AND, A+B = OR, Ā = NOT.
n inputs → 2^n truth-table rows in binary order.
Precedence: NOT, then AND, then OR.

How it’s examined

Section 3.2 is assessed in Paper 1 (Theory Fundamentals, 1 h 30 min, 75 marks) — written, externally assessed, no calculator. Expect to: complete a truth table from a circuit or expression; draw a circuit from an expression or worded problem; and write an expression from a circuit, problem or truth table. List all 2^n rows in binary order, use intermediate columns, keep brackets, and watch for inversion bubbles on gate symbols.

Sources: Cambridge International AS & A Level Computer Science 9618 syllabus (2027-2029), section 3.2. Last reviewed 2026-06-21.

Take this whole topic with you

Step-by-step worked examples — Logic Gates and Logic Circuits

Step-by-step solutions to past-paper-style questions on logic gates and logic circuits, written exactly the way a tutor would explain them at the board.

Question type:

1Truth tables for NOT and AND
Getting startedGraph or diagram• 9618 Paper 1 style• truth table, NOT, AND, AO1
Question
Complete a truth table for (a) a NOT gate with input A, and (b) a 2-input AND gate with inputs A and B. (3 marks)
Step-by-step solution
1. Step 1
  A NOT gate has one input. Its output is the opposite (inverse) of the input: input 0 gives output 1, input 1 gives output 0.
2. Step 2
  A 2-input AND gate has four input combinations (00, 01, 10, 11). The output is 1 only when BOTH inputs are 1; otherwise it is 0.
3. Step 3
  Write the output column carefully against each row of inputs.
Answer
NOT: A=0 → 1, A=1 → 0. AND: 00→0, 01→0, 10→0, 11→1 (output is 1 only when A AND B are both 1).
Examiner tip
1 mark for the NOT column, 2 marks for the AND column. The single most common slip is muddling AND with OR — say to yourself 'AND needs ALL inputs 1'.
2Identify a gate from its symbol and state its rule
Getting startedIdentify & classify• 9618 Paper 1 style• gate symbols, OR, AO1
Question
A logic gate is drawn as a curved-back shield shape with a pointed output and two inputs. (a) Name the gate. (b) State the condition under which its output is 1. (2 marks)
Step-by-step solution
1. Step 1
  Recall the standard (distinctive-shape) symbols: AND is a flat-backed D shape; OR is a curved-back shape that comes to a point; XOR is an OR shape with an extra curved line across the inputs.
2. Step 2
  A curved back with a pointed tip and no bubble on the output and no extra input curve is the OR gate.
3. Step 3
  An OR gate gives output 1 when at least one input is 1 — i.e. when A OR B (or both) is 1.
Answer
(a) OR gate. (b) Output is 1 when at least one input is 1 (A=1 OR B=1, or both).
Examiner tip
A small circle (bubble) on the output would change it to NOR. Always check for the bubble — its presence inverts the output, turning OR→NOR and AND→NAND.
3Write the logic expression from a 2-gate circuit
Building confidenceGraph or diagram• 9618 Paper 1 style• logic expression, circuit, AO2
Question
A circuit feeds inputs A and B into an AND gate. The output of that AND gate and a third input C are fed into an OR gate, whose output is X. Write the Boolean expression for X. (2 marks)
Step-by-step solution
1. Step 1
  Work from the inputs towards the output. The first gate is an AND of A and B.
  $\text{(first gate output)} = A.B$
2. Step 2
  The OR gate combines that result with C. OR is written with +.
  $X = (A.B) + C$
3. Step 3
  Keep the brackets so the AND is clearly evaluated before the OR (AND binds tighter, like multiplication before addition).
Answer
X = (A.B) + C
Examiner tip
Label intermediate outputs as you trace the circuit. Marks are lost when students drop the brackets and write A.B+C ambiguously, or reverse the order of operations.
4Build a circuit from a logic expression
Building confidenceGraph or diagram• 9618 Paper 1 style• circuit construction, expression, AO2
Question
Draw a logic circuit for the expression X = (NOT A).B + C, using one NOT gate, one AND gate and one OR gate. Describe the connections. (3 marks)
Step-by-step solution
1. Step 1
  Deal with the innermost operation first: NOT A. Pass input A through a NOT gate to produce Ā.
  $\bar{A} = \text{NOT}(A)$
2. Step 2
  The AND of Ā and B: feed Ā (the NOT-gate output) and input B into an AND gate.
  $\bar{A}.B$
3. Step 3
  Finally OR that result with C: feed the AND-gate output and input C into an OR gate. Its output is X.
  $X = (\bar{A}.B) + C$
Answer
A → NOT gate → (Ā). Ā and B → AND gate → (Ā.B). (Ā.B) and C → OR gate → X. So X = (NOT A).B + C.
Examiner tip
Build in order of precedence: NOT first, then AND, then OR. A frequent error is wiring the raw A (not Ā) into the AND gate — only the NOT-gate output should connect there.
5From a worded problem to an expression and truth table
StretchWord problem• 9618 Paper 1 style• problem statement, expression, truth table, AO2, AO3
Question
An alarm output X must sound (X=1) when a window sensor A is open (A=1) AND a system-armed switch B is on (B=1). It must also sound when a panic button C is pressed (C=1), regardless of A and B. (a) Write the logic expression for X. (b) Construct its truth table. (5 marks)
Step-by-step solution
1. Step 1
  Translate each clause. 'A open AND B armed' is A.B. 'Panic C pressed (regardless of A,B)' adds C with an OR.
  $X = (A.B) + C$
2. Step 2
  Three inputs (A, B, C) give 2³ = 8 rows. List them in binary counting order 000 to 111 so none is missed.
3. Step 3
  For each row compute A.B (1 only when A and B are both 1), then OR with C (X=1 if A.B is 1 OR C is 1).
4. Step 4
  X is 1 in every row where C=1 (rows 001,011,101,111) and also in the row 110 where A.B=1 with C=0.
Answer
(a) X = (A.B) + C. (b) X=1 for A,B,C = 001, 011, 101, 110, 111; X=0 for 000, 010, 100.
Examiner tip
List input rows in strict binary order so all 8 combinations appear once. The marks split: expression (2), correct number of rows / order (1), correct output column (2). Note C=1 forces X=1 on its own — a good sanity check.
6Truth table → expression → 3-input circuit (with NAND)
StretchGraph or diagram• 9618 Paper 1 style• truth table, NAND, circuit, AO2, AO3
Question
A truth table gives X=1 only for the input rows A,B,C = 110 and 111 (i.e. whenever A=1 AND B=1), and X=0 for all other rows. (a) Write the simplest expression for X. (b) Then write an expression that gives the inverse of X using a single NAND gate, and name the gate combination it replaces. (4 marks)
Step-by-step solution
1. Step 1
  X is 1 exactly when A=1 and B=1, and C makes no difference (both C=0 and C=1 give X=1 when A.B=1). So C drops out.
  $X = A.B$
2. Step 2
  The inverse of X is NOT(A.B). By definition a NAND gate outputs NOT(AND), so one NAND gate fed with A and B gives this directly.
  $\overline{X} = \overline{A.B} = \text{NAND}(A,B)$
3. Step 3
  A single NAND gate therefore replaces an AND gate followed by a NOT gate — that combination is exactly what NAND means.
Answer
(a) X = A.B. (b) Inverse = NOT(A.B) = NAND(A, B); a single NAND gate replaces an AND gate followed by a NOT gate.
Examiner tip
Spotting that C is irrelevant (X identical for C=0 and C=1) is the A* move — it simplifies the expression. Then recall the identity NAND = NOT(AND) to collapse two gates into one.

Model Answers — Logic Gates and Logic Circuits

High-scoring sample answers for logic gates and logic circuits on the Cambridge IGCSE paper, with examiner-style notes mapping each response to the mark scheme and assessment objectives.

Question 1
9618 Paper 1 style2 marks
Construct the truth table for a 2-input XOR (EOR) gate with inputs A and B. (2 marks)
Model answer
Notation: A.B = AND, A+B = OR, A' = NOT A.

A B A XOR B
0 0 0
0 1 1
1 0 1
1 1 0

The output is 1 only when the two inputs are different.
Why this scores
1 mark for the four input rows in order, 1 mark for a fully correct output column. The classic mistake is giving 1 for the 11 row (that would be OR) — XOR gives 0 when inputs are the same.
Question 2
9618 Paper 1 style3 marks
A logic circuit feeds inputs A and B into a NOR gate. The output of the NOR gate is fed, together with input C, into an AND gate, whose output is X. Write the Boolean expression for X. (3 marks)
Model answer
Notation: A.B = AND, A+B = OR, the bar = NOT.

The NOR gate produces NOT(A+B), written $\\overline{A+B}$ .

The AND gate combines this with C:

$X = \\overline{(A+B)} . C$

In words: X is 1 only when C is 1 AND both A and B are 0.
Why this scores
Marks for: identifying NOR output as NOT(A+B) (1), ANDing with C (1), correct final expression with the inversion bar/brackets kept (1). Writing the NOR output as just A+B (forgetting the inversion) is the usual error.
Question 3
9618 Paper 1 style4 marks
A heating system turns on its output X (X=1) only when the temperature sensor A reads 'cold' (A=1) AND the system is switched on at B (B=1). Otherwise the heater is off. (a) Write the logic expression for X. (b) Describe the single logic gate needed and its truth table. (4 marks)
Model answer
Notation: A.B = AND, A+B = OR, A' = NOT A.

(a) Both conditions must be true together, so this is an AND:

$X = A.B$

(b) A single 2-input AND gate is needed, with A and B as inputs and X as output. Its truth table is:

A B X = A.B
0 0 0
0 1 0
1 0 0
1 1 1

The heater output X is 1 only when both the 'cold' sensor and the on-switch are 1.
Why this scores
(a) 1 mark for X = A.B. (b) 1 mark for naming the AND gate, 2 marks for a correct truth table. 'Only when BOTH conditions hold' is the trigger phrase for AND — beware of reading it as OR.
Question 4
9618 Paper 1 style5 marks
A circuit has output X = (A.B) + C'. Construct the full truth table for X using inputs A, B and C. (5 marks)
Model answer
Notation: A.B = AND, A+B = OR, C' = NOT C. Three inputs give 8 rows. Work out A.B, then C', then OR them.

A B C A.B C' X = (A.B)+C'
0 0 0 0 1 1
0 0 1 0 0 0
0 1 0 0 1 1
0 1 1 0 0 0
1 0 0 0 1 1
1 0 1 0 0 0
1 1 0 1 1 1
1 1 1 1 0 1

So X=1 for the rows 000, 010, 100, 110 and 111; X=0 for 001, 011, 101.
Why this scores
Up to 2 marks for correct intermediate columns (A.B and C'), up to 2 for the X column, 1 for listing all 8 rows in order. Using intermediate columns is strongly advised under no-calculator conditions — it makes errors easy to catch.
Question 5
9618 Paper 1 style6 marks
Name the six logic gates required by the syllabus and, for each, state the condition under which the output is 1. (6 marks)
Model answer
NOT — output is 1 when the single input is 0 (output is the inverse of the input).

AND — output is 1 when both inputs are 1.

OR — output is 1 when at least one input is 1.

NAND — output is 1 unless both inputs are 1 (it is NOT(AND)).

NOR — output is 1 only when both inputs are 0 (it is NOT(OR)).

XOR (also written EOR) — output is 1 when the two inputs are different.
Why this scores
1 mark per gate for a correct condition. NAND and NOR must be the inverses of AND and OR respectively — defining NAND as 'NOT(AND)' (output 1 unless both inputs are 1) is the clearest phrasing. XOR = 'inputs differ'.
Question 6
9618 Paper 1 style6 marks
(a) Explain the relationship between a NAND gate and a NOR gate and the gates AND and OR. (b) A designer replaces an OR gate followed by a NOT gate with a single gate. State which gate and give its truth table. (6 marks)
Model answer
(a) A NAND gate produces the inverse of an AND gate: NAND(A,B) = NOT(A.B). A NOR gate produces the inverse of an OR gate: NOR(A,B) = NOT(A+B). In each case adding an inverting bubble to the output of the basic gate turns AND→NAND and OR→NOR.

(b) An OR gate followed by a NOT gate is exactly a NOR gate (output = NOT(A+B)). Its truth table is:

A B A+B X = NOT(A+B)
0 0 0 1
0 1 1 0
1 0 1 0
1 1 1 0

The NOR output is 1 only when both inputs are 0.
Why this scores
(a) up to 3 marks: NAND = NOT(AND) (1), NOR = NOT(OR) (1), the inverting-bubble idea (1). (b) names NOR (1) and gives a correct truth table (2). The phrase 'output 1 only when both inputs are 0' is the high-value statement for NOR.

A	B	A XOR B
0	0	0
0	1	1
1	0	1
1	1	0

A	B	X = A.B
0	0	0
0	1	0
1	0	0
1	1	1

A	B	C	A.B	C'	X = (A.B)+C'
0	0	0	0	1	1
0	0	1	0	0	0
0	1	0	0	1	1
0	1	1	0	0	0
1	0	0	0	1	1
1	0	1	0	0	0
1	1	0	1	1	1
1	1	1	1	0	1

A	B	A+B	X = NOT(A+B)
0	0	0	1
0	1	1	0
1	0	1	0
1	1	1	0

Key Definitions and Keywords — Logic Gates and Logic Circuits

Definitions to memorise and the exact keywords mark schemes credit for logic gates and logic circuits answers — sharpened from recent examiner reports for the 2026 Cambridge IGCSE sitting.

Logic gate
Examiner keyword
An electronic component that takes one or more binary inputs (0 or 1) and produces a single binary output according to a fixed logical rule.
Truth table
Examiner keyword
A table listing every possible combination of input values for a gate or circuit alongside the resulting output. A circuit with n inputs has 2^n rows.
Example
A 2-input gate has 2² = 4 rows; a 3-input circuit has 2³ = 8 rows.
NOT gate
Examiner keyword
A single-input gate whose output is the inverse of its input: input 0 gives output 1, input 1 gives output 0. Written as Ā or NOT(A).
AND gate
Examiner keyword
A gate whose output is 1 only when both inputs are 1. Written as A.B.
OR gate
Examiner keyword
A gate whose output is 1 when at least one input is 1. Written as A+B.
NAND gate
Examiner keyword
A gate whose output is the inverse of AND: output is 1 unless both inputs are 1. Equivalent to NOT(A.B).
NOR gate
Examiner keyword
A gate whose output is the inverse of OR: output is 1 only when both inputs are 0. Equivalent to NOT(A+B).
XOR (EOR) gate
Examiner keyword
A gate whose output is 1 when its two inputs are different, and 0 when they are the same. Also called Exclusive OR (EOR).
Logic (Boolean) expression
Examiner keyword
An algebraic statement of a circuit's behaviour using the operators . (AND), + (OR) and the inversion bar/NOT, e.g. X = (A.B) + C.
Logic circuit
A diagram of interconnected logic gates that produces one or more outputs from a set of inputs, drawn using the standard gate symbols.
Inversion bubble
The small circle drawn on a gate's output that inverts it. Adding it turns AND→NAND, OR→NOR; the NOT gate is a buffer with such a bubble.
Input combination
One row of a truth table: a particular set of 0/1 values for all the inputs. The combinations are listed in binary counting order (000, 001, 010, …).

Common Mistakes and Misconceptions — Logic Gates and Logic Circuits

The traps other students keep falling into on logic gates and logic circuits questions — taken from recent Cambridge IGCSE examiner reports and mark schemes — and how to avoid them.

✕Swapping AND and OR — e.g. giving output 1 for the 11 row only when describing OR, or 1 for any input being 1 when describing AND.
Examiner reports note frequent confusion of AND/OR conditions in truth-table questions.
Why it happens
Everyday English uses 'and'/'or' loosely, so students don't anchor to the precise rule.
How to avoid it
Memorise: AND output is 1 only when ALL inputs are 1; OR output is 1 when AT LEAST ONE input is 1.
✕Leaving out input rows or listing them out of order in a truth table (e.g. only 6 of the 8 rows for a 3-input circuit).
Why it happens
Students write rows from memory rather than counting systematically, so combinations get skipped or duplicated.
How to avoid it
Always write 2^n rows in strict binary counting order (000, 001, 010, …, 111). Check the row count before filling outputs.
✕Confusing NAND with NOR, or forgetting they are the INVERSES of AND and OR.
Why it happens
The names sound similar and the symbols differ only by an inversion bubble.
How to avoid it
Remember: NAND = NOT(AND) (1 unless both inputs are 1); NOR = NOT(OR) (1 only when both inputs are 0).
✕Treating XOR the same as OR — giving output 1 for the 11 row.
Why it happens
XOR and OR agree on three of four rows, so the 11 case is overlooked.
How to avoid it
XOR = 1 only when inputs DIFFER. For the 11 row (inputs the same), XOR output is 0.
✕Writing an ambiguous expression such as A.B+C without brackets, or evaluating OR before AND.
Why it happens
Students forget that AND binds tighter than OR (like × before +).
How to avoid it
Evaluate NOT first, then AND, then OR. Use brackets — (A.B) + C — to make precedence explicit.
✕Misreading a gate symbol by ignoring the inversion bubble, e.g. calling a NAND gate 'AND' or a NOR gate 'OR'.
Why it happens
The bubble is small and easy to overlook when scanning a circuit quickly.
How to avoid it
Check every output for a bubble: a bubble means the basic gate's output is inverted (AND→NAND, OR→NOR).

Logic Gates and Logic Circuits

Detailed Study Notes

At a glance

What you’ll learn

Quick recap

Memorise this

How it’s examined

Take this whole topic with you

1Truth tables for NOT and AND

2Identify a gate from its symbol and state its rule

3Write the logic expression from a 2-gate circuit

4Build a circuit from a logic expression

5From a worded problem to an expression and truth table

6Truth table → expression → 3-input circuit (with NAND)

Logic gate

Truth table

NOT gate

AND gate

OR gate

NAND gate

NOR gate

XOR (EOR) gate

Logic (Boolean) expression

Logic circuit

Inversion bubble

Input combination

✕Swapping AND and OR — e.g. giving output 1 for the 11 row only when describing OR, or 1 for any input being 1 when describing AND.

✕Leaving out input rows or listing them out of order in a truth table (e.g. only 6 of the 8 rows for a 3-input circuit).

✕Confusing NAND with NOR, or forgetting they are the INVERSES of AND and OR.

✕Treating XOR the same as OR — giving output 1 for the 11 row.

✕Writing an ambiguous expression such as A.B+C without brackets, or evaluating OR before AND.

✕Misreading a gate symbol by ignoring the inversion bubble, e.g. calling a NAND gate 'AND' or a NOR gate 'OR'.