What are the basic types of standard logic gates used in Boolean logic?

The basic types of standard logic gates used in Boolean logic include AND, OR, NOT, NAND, NOR, XOR, and XNOR gates. Each gate performs a specific logical function, which is fundamental in digital circuits and computer science, especially at the Cambridge IGCSE level.

How does an AND gate function in a digital circuit?

An AND gate is a digital logic gate that outputs true or 1 only if all its inputs are true or 1. In Boolean logic, this is represented as A AND B = A * B. This gate is crucial for performing logical operations in computer science and is a key component of the Cambridge IGCSE curriculum.

What is the significance of the NOT gate in Boolean logic?

The NOT gate, also known as an inverter, is a fundamental logic gate that outputs the opposite value of its input. If the input is true (1), the output is false (0), and vice versa. This gate is essential for creating more complex logic circuits and is a foundational concept in the Cambridge IGCSE Computer Science syllabus.

Can you explain the difference between NAND and NOR gates?

NAND and NOR gates are universal gates, meaning they can be used to create any other type of logic gate. A NAND gate outputs false only when all inputs are true, while a NOR gate outputs true only when all inputs are false. Understanding these gates is crucial for students studying Boolean logic in the Cambridge IGCSE Computer Science course.

Why are XOR and XNOR gates important in digital electronics?

XOR (exclusive OR) and XNOR (exclusive NOR) gates are important because they perform operations that are not possible with just AND, OR, and NOT gates. An XOR gate outputs true only when the inputs are different, while an XNOR gate outputs true only when the inputs are the same. These gates are vital for error detection and correction in digital systems, a topic covered in the Cambridge IGCSE Computer Science curriculum.

Why is "Confusing OR and XOR" a common mistake in Standard Logic Gates?

Why it happens: Both output 1 when 'at least one is 1'. How to avoid it: OR: 1 when AT LEAST ONE input is 1 (including BOTH). XOR: 1 when EXACTLY ONE input is 1 (NOT both). The 11 row is the difference. Source: 0478 Examiner Reports 2022-2024

Why is "Drawing NAND as a separate AND-then-NOT pair" a common mistake in Standard Logic Gates?

Why it happens: NAND IS conceptually that. How to avoid it: In symbol form, NAND is drawn as the AND symbol with a small circle on the output. ONE GATE, not two.

Why is "Writing a 3-row truth table for two inputs" a common mistake in Standard Logic Gates?

Why it happens: Students forget the 11 row. How to avoid it: Two inputs = 4 rows (00, 01, 10, 11). Three inputs = 8 rows. Always 2^n rows.

Why is "Drawing NOT with two inputs" a common mistake in Standard Logic Gates?

Why it happens: Other gates have two inputs. How to avoid it: NOT has ONE INPUT only — it inverts that single input. Never two-input.

Boolean logicCambridge IGCSE Computer Science (0478)

Standard Logic Gates

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Standard Logic Gates Study Notes — Cambridge IGCSE Computer Science 0478 (2026-2028 syllabus)

Six logic gates — AND, OR, NOT, NAND, NOR, XOR — and their truth tables. The building blocks every digital circuit (and ultimately every CPU instruction) is made from.

What you’ll learn

Mapped to the Cambridge IGCSE 0478 syllabus (2026-2028).

1.27.1 — Identify the six standard logic gates.
1.27.2 — State the truth table for each gate.
1.27.3 — Recognise gate symbols.
1.27.4 — Use logic gates in real-world examples.

AND, OR, NOT — the basics

Three gates that do everything else can be built from.

AND gate. Output is 1 ONLY when BOTH (or all) inputs are 1.

A	B	A AND B
0	0	0
0	1	0
1	0	0
1	1	1

Real-world example: 'Coffee maker turns on when (water tank is full) AND (power switch is on)'.

OR gate. Output is 1 if AT LEAST ONE input is 1.

A	B	A OR B
0	0	0
0	1	1
1	0	1
1	1	1

Real-world example: 'Doorbell rings when (front door pressed) OR (back door pressed)'.

NOT gate. SINGLE input. Output INVERTS the input.

A	NOT A
0	1
1	0

Real-world example: 'Light comes on when it is NOT daytime'.

Cambridge tip. Always show truth tables row-by-row. Mark scheme awards method marks even for partial answers.

AND: 1 only if both inputs 1.
OR: 1 if at least one input 1.
NOT: inverts a single input.

See the full worked example for standard logic gates →

NAND, NOR, XOR — the rest

NAND and NOR are universal; XOR detects difference.

NAND gate. AND followed by NOT. Output is 1 unless BOTH inputs are 1.

A	B	A NAND B
0	0	1
0	1	1
1	0	1
1	1	0

NOR gate. OR followed by NOT. Output is 1 ONLY when BOTH inputs are 0.

A	B	A NOR B
0	0	1
0	1	0
1	0	0
1	1	0

Universal gates. NAND alone (or NOR alone) can implement ANY logic function. CPU manufacturers use this fact — circuits made from a single gate type are simpler to manufacture.

XOR gate. Output is 1 when inputs DIFFER (exactly one is 1).

A	B	A XOR B
0	0	0
0	1	1
1	0	1
1	1	0

Used in: ADDERS (the carry-propagation logic), parity bits, error detection (covered in Topic 3).

Cambridge tip. Mark scheme distinguishes OR from XOR by the (1,1) row. Memorise it — that's the test.

NAND = NOT(AND). NOR = NOT(OR).
Both NAND and NOR are universal — any circuit from one type.
XOR = different inputs → 1; same → 0.

See the full worked example for standard logic gates →

Real-world gate use

Every digital decision is gates working together.

Logic gates appear everywhere in computer systems and electronics.

Inside a CPU. All arithmetic and logic operations (the ALU's job) are implemented using combinations of AND, OR, NOT, XOR. A 1-bit full adder is just a couple of XORs, a couple of ANDs and an OR.

Memory cells. Latches and flip-flops (the building blocks of RAM cells) are NAND or NOR gates wired in feedback loops.

Decoders and multiplexers. Address decoders in memory chips use AND gates to select the right cell. Multiplexers select between inputs using AND/OR combinations.

Real-world examples.

Burglar alarm: Triggers if sensor active AND alarm is armed AND key has not just been pressed.
Car safety: Engine cuts out if seatbelt NOT fastened AND speed > 5 mph (after 2 minutes).
Smart kettle: Heats if (button pressed) AND (water level OK) AND (lid closed).
Accept-or-reject form: Submits if (all required fields presence-checked) AND (terms accepted).

Cambridge tip. When a question gives a real-world scenario, BREAK IT DOWN into individual conditions then identify the gates connecting them.

CPUs and memory are built from gates.
Real-world systems use gates to combine sensor inputs.
Practice: break a scenario into conditions; identify gates.

See the full worked example for standard logic gates →

How it’s examined

Logic gates appear on every Paper 2. Most-tested questions: complete a truth table (6-8 marks), identify gates from descriptions (4-6 marks), apply gates to a real-world scenario (6-8 marks). Examiner reports flag confusion between OR and XOR as the most common error.

Sources: Cambridge IGCSE Computer Science 0478 syllabus (2026-2028); 0478 Examiner Reports 2022-2024; 0478/22 Oct/Nov 2024 question paper and mark scheme. Last reviewed 2026-05-09.

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Step-by-step worked examples — Standard Logic Gates

Step-by-step solutions to past-paper-style questions on standard logic gates, written exactly the way a tutor would explain them at the board.

1Complete truth tables for AND, OR, XOR (8 marks)
Core• Adapted from 0478/22 Oct/Nov 2024 Q11• logic-gates, truth-table
Question
Complete a truth table showing the output of A AND B, A OR B, A XOR B for all combinations of A and B. (8 marks)
Step-by-step solution
1. Step 1
  Set up rows (1 mark). Four rows for A and B = 00, 01, 10, 11.
2. Step 2
  AND (3 marks). Output 1 ONLY when BOTH inputs are 1. AND: 0, 0, 0, 1.
3. Step 3
  OR (2 marks). Output 1 when AT LEAST ONE input is 1. OR: 0, 1, 1, 1.
4. Step 4
  XOR (2 marks). Output 1 when EXACTLY ONE input is 1 (different inputs). XOR: 0, 1, 1, 0.
Answer

A B AND OR XOR
0 0 0 0 0
0 1 0 1 1
1 0 0 1 1
1 1 1 1 0
2NOT, NAND and NOR (6 marks)
Extended• logic-gates
Question
Describe the operation of the NOT, NAND and NOR gates. State the relationship between NAND and AND, and between NOR and OR. (6 marks)
Step-by-step solution
1. Step 1
  NOT (2 marks). A SINGLE-INPUT gate that INVERTS the input. NOT 0 = 1; NOT 1 = 0. Symbol: input followed by a triangle with a small circle on the output.
2. Step 2
  NAND (2 marks). AND gate followed by a NOT — i.e. NOT (A AND B). Output is 1 unless BOTH inputs are 1. Truth table: 1, 1, 1, 0.
3. Step 3
  NOR (2 marks). OR gate followed by a NOT — i.e. NOT (A OR B). Output is 1 ONLY when BOTH inputs are 0. Truth table: 1, 0, 0, 0.
Answer
NOT inverts. NAND = NOT(AND); NOR = NOT(OR). NAND and NOR are 'universal gates' — any logic circuit can be built using only NANDs (or only NORs).
3Real-world gate use (6 marks)
Extended• logic-gates, application
Question
A car has the following safety systems:

The seatbelt warning sounds if the engine is on AND the seatbelt is NOT fastened.

The interior light comes on if a door is open OR the interior-light switch is on. Identify the gate(s) used in each system and explain how they decide. (6 marks)
Step-by-step solution
1. Step 1
  Seatbelt warning (3 marks). Two inputs: ENGINE-ON, SEATBELT-FASTENED. Use a NOT gate on SEATBELT-FASTENED to get SEATBELT-NOT-FASTENED. Then AND with ENGINE-ON. Warning sounds when both are 1.
2. Step 2
  Interior light (3 marks). Two inputs: DOOR-OPEN, SWITCH-ON. Use an OR gate. Light comes on if either is 1.
Answer
Seatbelt: AND with NOT on seatbelt input — Engine AND (NOT Belt). Interior light: OR — Door OR Switch. Real circuits combine basic gates this way.

A	B	AND	OR	XOR
0	0	0	0	0
0	1	0	1	1
1	0	0	1	1
1	1	1	1	0

Key Definitions and Keywords — Standard Logic Gates

Definitions to memorise and the exact keywords mark schemes credit for standard logic gates answers — sharpened from recent examiner reports for the 2026 0478 sitting.

AND gate
Examiner keyword
Output is 1 ONLY when ALL inputs are 1. Pseudocode: IF A AND B.
OR gate
Examiner keyword
Output is 1 if AT LEAST ONE input is 1. Pseudocode: IF A OR B.
NOT gate (Inverter)
Examiner keyword
A SINGLE-INPUT gate that inverts the input. NOT 0 = 1; NOT 1 = 0.
NAND gate
Examiner keyword
Inverted AND. Output is 1 unless ALL inputs are 1. Universal gate — any circuit can be built from NANDs alone.
NOR gate
Examiner keyword
Inverted OR. Output is 1 ONLY when ALL inputs are 0. Universal gate.
XOR gate (Exclusive OR)
Examiner keyword
Output is 1 when inputs DIFFER (exactly one is 1). Used in adders and parity circuits.
Truth table
Examiner keyword
A table showing the output of a gate or circuit for every possible combination of inputs.

Common Mistakes and Misconceptions — Standard Logic Gates

The traps other students keep falling into on standard logic gates questions — taken from recent Cambridge IGCSE 0478 examiner reports and mark schemes — and how to avoid them.

✕Confusing OR and XOR
0478 Examiner Reports 2022-2024
Why it happens
Both output 1 when 'at least one is 1'.
How to avoid it
OR: 1 when AT LEAST ONE input is 1 (including BOTH). XOR: 1 when EXACTLY ONE input is 1 (NOT both). The 11 row is the difference.
✕Drawing NAND as a separate AND-then-NOT pair
Why it happens
NAND IS conceptually that.
How to avoid it
In symbol form, NAND is drawn as the AND symbol with a small circle on the output. ONE GATE, not two.
✕Writing a 3-row truth table for two inputs
Why it happens
Students forget the 11 row.
How to avoid it
Two inputs = 4 rows (00, 01, 10, 11). Three inputs = 8 rows. Always 2^n rows.
✕Drawing NOT with two inputs
Why it happens
Other gates have two inputs.
How to avoid it
NOT has ONE INPUT only — it inverts that single input. Never two-input.

Practice questions

Exam-style questions with step-by-step worked solutions. Try one before checking the method.

Past paper style quiz

Get a report showing which sub-topics you've nailed and which ones still need work.

Standard Logic Gates — frequently asked questions

The things students keep getting wrong in this sub-topic, answered.

A AND B

A OR B

NOT A

A NAND B

A NOR B

A XOR B

Logic gates appear everywhere in computer systems and electronics.

Inside a CPU. All arithmetic and logic operations (the ALU's job) are implemented using combinations of AND, OR, NOT, XOR. A 1-bit full adder is just a couple of XORs, a couple of ANDs and an OR.

Memory cells. Latches and flip-flops (the building blocks of RAM cells) are NAND or NOR gates wired in feedback loops.

Decoders and multiplexers. Address decoders in memory chips use AND gates to select the right cell. Multiplexers select between inputs using AND/OR combinations.

Real-world examples.

Burglar alarm: Triggers if sensor active AND alarm is armed AND key has not just been pressed.
Car safety: Engine cuts out if seatbelt NOT fastened AND speed > 5 mph (after 2 minutes).
Smart kettle: Heats if (button pressed) AND (water level OK) AND (lid closed).
Accept-or-reject form: Submits if (all required fields presence-checked) AND (terms accepted).

Cambridge tip. When a question gives a real-world scenario, BREAK IT DOWN into individual conditions then identify the gates connecting them.

A	B	AND	OR	XOR
0	0	0	0	0
0	1	0	1	1
1	0	0	1	1
1	1	1	1	0

AND

XOR

Standard Logic Gates

Short Study Notes in the form of Slides

Detailed Study Notes

What you’ll learn

How it’s examined

1Complete truth tables for AND, OR, XOR (8 marks)

2NOT, NAND and NOR (6 marks)

3Real-world gate use (6 marks)

AND gate

OR gate

NOT gate (Inverter)

NAND gate

NOR gate

XOR gate (Exclusive OR)

Truth table

✕Confusing OR and XOR

✕Drawing NAND as a separate AND-then-NOT pair

✕Writing a 3-row truth table for two inputs

✕Drawing NOT with two inputs

Practice questions

Past paper style quiz

Assess your understanding

Standard Logic Gates — frequently asked questions

Standard Logic Gates

Short Study Notes in the form of Slides

Detailed Study Notes

What you’ll learn

How it’s examined

1Complete truth tables for AND, OR, XOR (8 marks)

2NOT, NAND and NOR (6 marks)

3Real-world gate use (6 marks)

AND gate

OR gate

NOT gate (Inverter)

NAND gate

NOR gate

XOR gate (Exclusive OR)

Truth table

✕Confusing OR and XOR

✕Drawing NAND as a separate AND-then-NOT pair

✕Writing a 3-row truth table for two inputs

✕Drawing NOT with two inputs

Practice questions

Past paper style quiz

Assess your understanding

Standard Logic Gates — frequently asked questions